Which process need for digital PLL/DLL IPs?

[davidsu]

If a pure digial ASIC design has to use some PLL/DLL IP within it, then what it needs is a digital or mixed-signal process?

Thanks.

 

[rajesh13]

If a pure digial ASIC design has to use some PLL/DLL IP within it, then what it needs is a digital or mixed-signal process?

Thanks.

Hi davidsu,

the process is same for digital or mixed signal designs. The only difference I see is the different circuit design approach.

Are you talking about the flow.

 

[Hughes]

It depends on the IP you use. All digital PLL/DLL are usually designed for standard logic process. But if the PLL/DLL is a so-called digital PLL/PLL(only the frequency detector and frequecny divider are digital), it may be implented with standard-logic or mixed-signal process. The difference may be the latter uses double-poly capacitors.