carporsche
Junior Member level 2
Hi guyz
I am designing an ASIC CMOS op-amp for meeting following design specs in TSMC .35um tech.
1. open-loop gain : 65-70dB
2. Unity gain frequency : 500MHz
3. Phase Margin ~ 60 degrees
4. Need an internal compensation technique.
5. 2 V p-p ODR
Can someone suggest me a configuration to be used.
Can this be achieved by using a standard folded cascode technique followed by a class AB output stage?
Thanks
I am designing an ASIC CMOS op-amp for meeting following design specs in TSMC .35um tech.
1. open-loop gain : 65-70dB
2. Unity gain frequency : 500MHz
3. Phase Margin ~ 60 degrees
4. Need an internal compensation technique.
5. 2 V p-p ODR
Can someone suggest me a configuration to be used.
Can this be achieved by using a standard folded cascode technique followed by a class AB output stage?
Thanks