Which one is better Zero IF or Low IF?

Which one is better, Zero-IF or Low-IF. My problem is that for Zero-IF I need to use quadrature demodulators with dual channel ADCs where as for a Low-IF a single ADC can be used but Digital Down Conversion must be performed which consumes logic resources.

Apart from cost and complexity, which of the above two has better performance and and do they have any benefits when used in receiver diversity or MIMO systems?

Thanks.

low if + single adc

Define better, and you'll probably get a better answer.

For a low IF with a single mixer, give some thought to the first image and the filtering specifications that you require.

For a direct conversion receiver, give some thought to DC offset requirements and 1/f noise in small logic processes.

in small feature sizes (90 nm and below) an additional 100k logic gate chunk for a digital down converter is pretty low cost.

Dave
www.keystoneradio.com

comparison between zero if and low if

it all depend on ur application , and which performance metrics u need

i agree with RFDave

try to specify , how u need to compare between them

Khouly

compare zero if low if

Thanks RFDave and khouly.

The intended application is a UHF downconverter with 2MHz bandwidth using MIMO (2x2 or 4x4), so all the mixers will be run from the same local oscillator.

I don't know much about RF so can you clear some of the questions below:

1) How low can the Low-IF mixer be for the above application?

2) Are there any active mixers IC's with/without integrated PLL/VCO that can be used for Low-IF (variable IF) and programmable filters?

3) Are 10-bit ADCs good enough for the above?

4) How much minimum oversampling is needed to acheive good performance relative to nyquist-sampling, if that is too subjective then what are common oversampling numbers?

Thanks.

zero-if vs low-if

If you need UHF, why don't you use a zero IF tuner IC, ready available?

digital down converters mixer images

1) Do you mean how low could be the IF ? I thin it could be down to 1MHz,
3) The number of bit of ADC is determined by the SNR of signal at the input of the ADC

low if and zero if

melc said:

If you need UHF, why don't you use a zero IF tuner IC, ready available?

Click to expand...

For Zero-IF I must use 2 ADC channels for each MIMO antenna. With Low-IF I can get away (hopefully) with slightly higher sampling rate and logic resources in the FPGA for Down Conversion.

Added after 15 minutes:

Also can anyone suggest me a PLL Synthesizer/VCO for Local Oscillator that can operate at UHF frequencies and has a serial interface to control the output frequency with enough output power to drive upto 4 Active Mixers. Thanks.

zero-if low-if

I Think it is better you use from the method is used in software radio, i.e. "program".
in software radio after BPF data is convert to baseband with a coarse carrier and after hilbert transform and product it became complex. then the process is routine. the remainder CFO remove in fine CFO correction.

for oversampling factor also you must consider timing process example gardner or early-late or Meyer method.

also I think using 12 bit ADC is better.

tuner 2mhz bandwidth

salam2000 said:

I Think it is better you use from the method is used in software radio, i.e. "program".
in software radio after BPF data is convert to baseband with a coarse carrier and after hilbert transform and product it became complex. then the process is routine. the remainder CFO remove in fine CFO correction.
for oversampling factor also you must consider timing process example gardner or early-late or Meyer method.

also I think using 12 bit ADC is better.

Click to expand...

Isn't that multi-channel baseband sampling technique only usedful for different basebands and not MIMO systems that operate in the same frequency/baseband?

Thanks for the tips on oversampling methods, I'll look into them.

Also I was wondering if a single channel ADC can be used to sample both I/Q signals with TDM (Time Division Multplexing)? What kind of impact will it have on I/Q mismatch or maybe I can use external Sample/Hold to sample the I/Q signals over two ADC sample times effectively emulating lower sampling.

low-if zero-if

You may run into a real image problem with a low IF approach. In the low IF approach, you'll have the receive signal you are trying to receive, at a frequency of Fc. Using a mixer with a local oscillator frequency of Flo, you'll downconvert Fc to an IF frequency of Fif. Let's use some numbers.

Fc=400 MHz.
Flo=398 MHz
Fif = 2 MHz (Fc - Flo)

However, what happens if there is a signal at 396 MHz at the input to the mixer.

Fc=396 MHz
Flo=398 MHz
Fif = 2 MHz (Flo - Fc)

And now, you have your desired signal corrupted by a signal at the image frequency. If you use I/Q mixers, you'll get image suppression because of the relative phases of the I and Q Paths, (Still Low IF) but if you simply use a single mixer, you won't be able to remove it.

Is this a research project? if it is, you might want to look at some fast A/D Converters and use an IF Frequency of 20 to 30 MHz. If you do this, then you can use an image filter to reject the image, and you'll avoid that problem. This would require an A/D Sample rate of 80 to 100 MHz, which should be achievable, take a look at Maxim or Linear Technologies.

Keep in mind that hardware for low volume stuff is relatively cheap compared to coding and debug time. '


Dave

zero if

RFDave said:

You may run into a real image problem with a low IF approach. In the low IF approach, you'll have the receive signal you are trying to receive, at a frequency of Fc. Using a mixer with a local oscillator frequency of Flo, you'll downconvert Fc to an IF frequency of Fif. Let's use some numbers.

Fc=400 MHz.
Flo=398 MHz
Fif = 2 MHz (Fc - Flo)

However, what happens if there is a signal at 396 MHz at the input to the mixer.

Fc=396 MHz
Flo=398 MHz
Fif = 2 MHz (Flo - Fc)

And now, you have your desired signal corrupted by a signal at the image frequency. If you use I/Q mixers, you'll get image suppression because of the relative phases of the I and Q Paths, (Still Low IF) but if you simply use a single mixer, you won't be able to remove it.
Is this a research project? if it is, you might want to look at some fast A/D Converters and use an IF Frequency of 20 to 30 MHz. If you do this, then you can use an image filter to reject the image, and you'll avoid that problem. This would require an A/D Sample rate of 80 to 100 MHz, which should be achievable, take a look at Maxim or Linear Technologies.

Keep in mind that hardware for low volume stuff is relatively cheap compared to coding and debug time. '


Dave

Click to expand...

Does that mean I need to use a image rejection filter even for I/Q conversion?

The speed of the ADC doesn't bother me, it is the number of them. I am planning to test a 4x4 MIMO system, though I am using a virtex-II fpga, the logic resources will be high for 4 down conversion and filtering chains and I need to implement LDPC decoding in the same FPGA so I am trying to be stringent by using Zero-IF so that the sample rate can be around 6-8MSPS(2MHz baseband bandwidth), which then can be multiplexed onto a single filter chain(if needed) due to its low sampling rate.

low if zero-if

Well, as with most things that are engineering related, the answer is "It Depends". For integrated receive chains with on chip mixers and filters, your I and Q channels are matched well enough to get ~ 30 to 35 dB of image rejection for a low IF approach. Whether this is enough or not is up to you. If you want to receive a band of frequencies, you can't put a low IF image filter up front, because that would be in-band.

Dave