Re: which input has faster response for output rising edge??
AND gate will be a NAND gate followed by the inverter. For output rising edge of AND gate, the NAND gate has to be pulled down. Pull down is fast when the input is applied last to the transistor connected to the NAND o/p, assuming that the transistor connected to ground has already turned on by the earlier pattern. What this would mean is that the bottom transistor would have discharged to ground completely and when the top transistor turns on, it would have a direct path to ground and NAND o/p would be pulled down to zero which would then cause the inverter to give high output. I hope this explanation is correct.........
-Aravind