Which code is more synthesizable: structural or behavioral?

[shraddha]

hi
which code is more synthesizable?having structral or behavioral......its urgent coz i'm not gettimg simulatio results after that

regards,
Shraddha

 

[no_mad]

regarding synthesis

Hi,

Definitely, structural. Behavioral is non-synthesizable.
However, these two model can simulate.

* Behavioral Models : Higher level of modeling where behavior of logic is modeled.
* RTL Models : Logic is modeled at register level
* Structural Models : Logic is modeled at both register level and gate level.

Check out this link:


Let us know if u hv any doubts.

 

[shraddha]

Re: regarding synthesis

Hi,

Definitely, structural. Behavioral is non-synthesizable.
However, these two model can simulate.

* Behavioral Models : Higher level of modeling where behavior of logic is modeled.
* RTL Models : Logic is modeled at register level
* Structural Models : Logic is modeled at both register level and gate level.

Check out this link:


Let us know if u hv any doubts.

hi
can u plz tell me what is the basic difference between the structural & behaviral?code is non-synthesizable means actually what happen in that.i have synthesized behaviral codes also
regrads,
shraddha

 

[go4sandesh_vsn]

regarding synthesis

hi shraddha

i dont think there is anything like "MORE" synthesizable when u talk abt behavioural or structural or dataflow modeling...

bcoz if u write proper code, it'll always synthesize ...be it whichever modeling u used....

Letz go to the basics of modeling
C .. modeling is just a way of telling tool what do you expect ...i.e. wat circuit u want...
For eg. : letz take a very basic eg of "a 2 input XOR gate"
with A, B as input and Y as output
if u want to model it, then it can be done in any of the following ways (its not the limit)

1) Behavioural
if A = B then
Y= '0'
else
Y = '1'

2) Dataflow
Y = (A and (not B)) or ((not A) and B)
(note: its simply Y = AB' + A'B)

3) Structural
(here u need to give ur inputs to actual preexisting model of "AND gate, NOT gate, OR gate) to follow the eqn Y= AB' + A'B

this is called instantiation....so structural modeling means just connecting ur wires to actual gates...(i hope u get it)

u can go thru any basic VHDL or Verilog books...they all explain modeling

...........

so the point is tht these different codes for same XOR gate (or say any design) are provided for our convenience... clearly behavioural code is the simplest...it just follows the logic (i.e for XOR if A=B implies Y=0 else 1...right)...
but finally the tool converts it to structural model
..........

if any probs ..do feel free to ask....but i strongly suggest to go thru any topic on basics of modeling....its really very simple

 

[skygazer]

Re: regarding synthesis

hi
can u plz tell me what is the basic difference between the structural & behaviral?code is non-synthesizable means actually what happen in that.i have synthesized behaviral codes also
regrads,
shraddha

Behavioural code has some constructs such as integer division which cant be synthesized.
As a example take this code, which cannot be synthesized..
if(a=='x') then
...
...
else
...
...
end if
How can a variable compared to a unknown?
Synthesizable code is a narrow subset of verilog/vhdl..

 

[darylz]

regarding synthesis

what is synthesizable you must refer to the manul of synthesis tool for exact answer.