Where to find the doping profile of TSMC 180nm process

[Jack.W]

Hi, I am new to the layout and fabrication. Currently, I am using TSMC 180nm process for my project.

I would like to know where can I find the information about the doping profile of TSMC 180nm process.
In detail, I need mainly 3 specific values:

• Doping concentration for P-sub, N-well, and Deep N-well (DNW).
• The thickness of P-sub, N-well and DNW.
• The depth of P-sub, N-well and DNW.

These information are important to my project because I need them to simulate in Sentaurus TCAD and verify if my design works.

Thanks,
Jack.W

 

[loose-electron]

Have you looked over in the user design kits downloads at TSMC? There will be transistor models and physical design rules for layout. However TSMC may not want to release the doping profiles and physical dimensions.

 

[sidun.av]

Hi @Jack.W
I agree with @loose-electron that most likely TSMC will not provide such data because it's confidential.
The question is: why would you need these parameters for your design? Maybe these parameters can be found indirectly by simulation?

 

[dick_freebird]

If you're using blessed PDK devices then you don't need to be messing with TCAD.

If you think you can get a custom device past verification and into a product that could possibly blow back on the foundry, better get it in writing.

Somebody has probably already paid for a teardown RE report and you could probably get a copy ($$$$). But I'm betting on a free lunch play.

You could also bet that two foundry flows of same-same top line attributes are going to be very similar elsewise. So maybe one teardown report is as good as another. Especially if the real assignment is about the TCAD and the rest, just scenery.

 

[Jack.W]

Have you looked over in the user design kits downloads at TSMC? There will be transistor models and physical design rules for layout. However TSMC may not want to release the doping profiles and physical dimensions.

Yes, I have checked the documents from TSMC, but doping profile information is not concluded in them. I need these information is because my design wants to use the internal properties of layers, for example, the doping concentration of DNW is higher than P-well so the conductivity of DNW will be higher than P-well. I would like to test if I can use this property to alter the current flow inside the chip, and that's why I use TCAD tools to simulate the current flow inside the materials.
Thank you for your reply!

 

[Jack.W]

Hi @Jack.W
I agree with @loose-electron that most likely TSMC will not provide such data because it's confidential.
The question is: why would you need these parameters for your design? Maybe these parameters can be found indirectly by simulation?

Thank you for the reply!
I need these information is because I would like to test if I can use the internal properties of layers to alter the current flow inside the chip. E.g. Since DNW has a higher doping concentration than P-well, so the conductivity of DNW will be higher, and this may be possible for the current flow altering. If I can get these data, I can then use TCAD tools to simulate in that TCAD tools require users to provide doping profile information to correctly simulate the current flow directions inside the chip.
I tried to use simulation to find such properties like conductivity, but it seems that I can hardly get such information through simulation.

 

[Jack.W]

If you're using blessed PDK devices then you don't need to be messing with TCAD.

If you think you can get a custom device past verification and into a product that could possibly blow back on the foundry, better get it in writing.

Somebody has probably already paid for a teardown RE report and you could probably get a copy ($$$$). But I'm betting on a free lunch play.

You could also bet that two foundry flows of same-same top line attributes are going to be very similar elsewise. So maybe one teardown report is as good as another. Especially if the real assignment is about the TCAD and the rest, just scenery.

Thank you for the reply!

Although I am using the TSMC 180nm PDK, I cannot find information about doping profiles in the documents, and maybe these are the confidential recipes.

Sorry I do not understand the meaning that "get a custom device past verification and into a product that could blow back on the foundry", do you mean directly test from a bare die?

Where can I get a teardown RE report? I will appreciate if you could give me some suggestions.

Thank you again for providing me with insights!

 

[loose-electron]

If you can get the data you need down to a handful of simple numbers, TSMC may be willing to provide that. Since it is an older process they may be less protective of the details.

However, unless you represent a big dollar customer it's going to be tough to get the attention from TSMC to get answers.

As for TCAD, it's a lot more for the physical fabrication modelling and, frankly, it's not that accurate, based on my experience there. I saw some of the foundry modelling efforts when I was part of IBM, and we were putting together their SiGe BiCMOS processes, I was doing model development and definition of passive devices for the design kit. (circa 2002 or so)