where i need to break loop for checking stability

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nannapaneni

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In the attached circuit is driving capacitance load and current of 5mA.
sense and vdd_1v8 pins are shorted outside.

To check stability and see loop gain and phase response for this circuit, where exactly i need to break loop?
 

As i mentioned vsense and vdd_1v1 are shorted in actual case. This node is low impedance node because of pmos common gate.
It is not giving correct phase response as well as dc loop gain also.
 

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