This will come down to people's tastes, coding styles and religious ideals.
Given your question, I assume you understand the difference between the two (ie. signal updated when a process next suspends, variables updated immediatly).
There are two main coding styles I employ. The first is to use variables to add clarity to registers. So consider the following code (I know its fairly simple, but I hope you get the concept)
Code:
signal a : unsigned(7 downto 0);
process(clk)
begin
if rising_edge(clk) then
--do an addition with saturation logic
if ('0' & x) + ('0' & y) > 255 then
a <= to_unsigned(255, 8)
else
a <= x + y;
end if;
end if;
end process
A variable could be used to add some clarity to the code and make it easier to read:
Code:
process(clk)
variable sum_temp : unsigned(8 downto 0);
begin
if rising_edge(clk) then
--do an addition
sum_temp := ('0' & x) + ('0' & y);
if sum_temp > 255 then
a <= to_unsigned(255, 8)
else
a <= sum_temp(7 downto 0); --or x + y if you wish
end if;
end if;
end process;
This breaks the code down into smaller peices of logic on real hardware, and might make it easier for someone else to understand whats going on in your code. Both processes above will create the same logic, but is a little easier to read.
The second school of thought is to keep as many things within as local a scope as possible. This can help when you have millions of signals in a file - if you instead used local variables rather than signals, it becomes clearer what logic is generated in which process. You can infer regisers from variables just by putting the assignments in the correct order. So these two bits of code are the same:
Code:
signal a,b,c,d : std_logic;
process(clk)
begin
if rising_edge(clk) then
a <= in;
b <= a;
c <= b;
d <= c;
out <= d;
end if;
end process;
--second method using variables - produces the same logic;
process(clk)
variable a,b,c,d : std_logic;
begin
if rising_edge(clk) then
out <= d;
d := c;
c := b;
b := a
a := in;
end if;
end process;
So the advantage is if you have a lot of processes, and a lot of signals, the second method is clearer which signals belong in which process(because there are fewer of them) and you can keep using the same names in different processes for the local variables because of scoping rules. The disadvantage is that you have to be careful with code ordering, and many people get confused when you start using variables, because many people prefer the first coding style.
---------- Post added at 09:41 ---------- Previous post was at 08:36 ----------
So to summerise - both signals and variables are in effect just wires between logic. But its the context that is all important.
Welcome to behavioral HDL.