When to use hysteresis comparator? Is it compulsory?

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Davidy

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I doubt at what condition should I use hysteresis comparator. Is hsysteresis compulsory?
Now I use comparator to convert two anti-phase sin. waves from sensor readout circuits to a square-wave.
The sin. waves are with about 100-150mV peak-to-peak voltage and 8kHz frequency.
If I use a comparator with 10mV hysteresis voltage, the output of comparator will have about 5-degree phase shift, which is problem.
Can i don't use hysteresis? or should i use only 1-2mV hysteresis?
Thank you !
 

Hysteresis is just a difference between the voltage a comparator sees as 'high' and what it sees as 'low'.

Imagine a gradually rising signal, such as your sine waves. The voltage is easily measurable at any point so a threshold at which the comparator changes state is easy to visualize. Now add noise to the waveform, even the tiniest amount will create a point where (signal + noise) is above the threshold and (signal - noise) is below it so at the threshold point the comparator could rapidly change state in time with the noise. Note that even with a perfectly filtered waveform there will be noise in the comparator itself to contend with.

The hysteresis is to help remove the effect of noise. The amount of hysteresis should be at least equal to the peak value of the noise so the switching points (upper and lower thresholds) are so different that the noise voltage cannot alone change the comparator output.

You don't have to use hysteresis, it depends upon your application, some systems are tolerant of rapid comparator switching, some are not. It's a tool to help to keep signal clean.

Some phase shift is inevitable because of the time delay while the signal reaches the hysteresis difference. You have to make a compromise between noise immunity and how much shift you see. Obviously, minimize the amount of hysteresis if possible.

Brian.
 

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    Davidy

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Any time that output "chatter" would produce misbehavior.

Hysteresis might or might not be the answer. There are other
debounce methods (time domain, set/reset window, etc.)
and the best choice depends on the nature of the input &
input accuracy requirements, and the sensitivities of whatever
is attached to the comparator output.
 

Thanks a lot. From your explanation I get a lot.
But I also doubt how to decide the hysteresis voltage in comparator? Should I use simulation to determine hysteresis voltage or through hand calculatioin?
In my system, a digital PFD(phase/frequency detector) is following behind the comparator. PFD is used to compare the signal phase from comparator and another signal.



Added after 6 minutes:

Thank you!
Can you give some more information about debounce methods (time domain, set/reset window, etc.)?
I really don't learn about debounce methods in comparator.

 

It is difficult to predict how much hysteresis is best to use, it depends on the relative proportion of signal and of noise and to some degree on the nature of the noise too.

The 'de-bounce' method is to a way of moving the noise solution to the comparator output instead of input. What you do is control the hysteresis so that some or all of the noise still causes the comparator to switch state. Then you filter the logic waveform at the comparator output. You can do this in hardware with a monostable or timed latch or you can do it in software if you are using a microcontroller.

Brian.
 

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