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while power on the output impedance of the inverter is zero since it is supposed to maintain its voltage value irrespective of the amount of current it sinks or sources.....
what we are talking about is the output impedance of the circuit and output impedance is pictured as being connected in series with the output.... since in our case the circuit output impedance is zero the drop from the output to the circuit to the output that we get is zero, no matter how much current flows..... it doesn't mean the circuits output will be zero...
EDA_81hg,
You might want to consider this way:
If the out put is high, say 3V, and output impedance is zero,
and if you put 1 kohm load, current will be 3mA.
If you put zero ohm load, current will be infinity.
Hope this helps.
S.H.
If I use RC circuit to enlarge the power rising time to the inverter and the input rising time to inverter follows the I/O rising timing set by FPAG without RC power delay.
What is the result?
Some guy said if use this way the inverter can be damaged.
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