when layout, what happen to the metal wire go through devece

[huangjw]

hi all,
1. if metal wire go through the matched MOSFET, how much will influence the accuracy?
2. if the metal wire is symetric on the matched MOSFET, HOW much will influence the accuracy?
3. how about the poly resistor.
thanks.

 

[bellona]

Routing of metal wire will affect the matching through stress gradient and hydrogenation, and i think it would somewhat alter thermal gradients if there exists any.
Metal wire should not route over MOSFET active region if precisely matching is needed. And the wiring adjacent to matched MOSFET should be kept symmetrical. Same rule applies to poly resistors as well.
These issues are coverd in detail in Alan Hastings's 'The Art of Analog Layout' .

 

[huangjw]

but infact, in many process, the filler will be add in, it may also go through the device.
if i don't use first metal, but use metal 2ed above, is it better

 

[bellona]

For hydrogenation, since the hydrogen compensation is introduced near the end of process when the formation of metal system is completed, it doesn't matter much which layer the metal is in.
Higher layer metal might introduce less stress gradient, which i'm not sure about.

 

[huangjw]

thanks, bellona,
can you upload this IEEE paper" Effects of metal coverage on MOSFET matching"
thank you!

 

[dick_freebird]

If you must route through, just route such that all devices see
the same metal coverage.

 

[bellona]

Re: when layout, what happen to the metal wire go through de

well, the experiment in the aforementioned paper does show that metal 2 did have much less impact on matching than metal 1.

As explained by the authors in another paper 'Characterization of Systematic MOSFET Current
Factor Mismatch Caused by Metal CMP Dummy
Structures', mismatch is caused by the threshold mismatch introduced by hydrogenation and carrier mobility mismatch introduced by stress gradient.

 

[huangjw]

so, could you please upload the paper?
thanks