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Humungus said:Offset is important in all applications where the DC level plays a role.
Also remember that you have two offset components: systematic and random.
Systematic offset arises for imperfections in your design. Random offset is given by the random mismatch appearing among devices "supposed" to be equal.
Reducing systematic offset depends upon your architecture. You can correct it by properly biasing your transistors and by appropriate setting of passive components.
Random offset mostly depends on the size of your devices and how they are laid out in your design. Also, there is a part of random offset depending on your bias, as active device mismatch is bias dependent.
Another way to reduce offset is the introduction of switched techniques, such as chopper, ping-pong and auto-zeroing.