when does maximum current flow in CMOS inverter

recently I attended an written test for TI. there was this question asking about when does maximum current pass through a CMOS inverter?
i answered when both pmos n nmos are on, i.e. as I thought when switching happens, n we use this as current amplifier also.....
But answer given stated that when both are off. pls can some one help???

hi ,

Just wanted to know one thing.. is there any condition something like... input switched from ON to OFF .. or OFF to ON ?
Just wnated to know if you get confused with respect to the way question was asked.

though there was something about switching...but still I would like to know how a cmos conducts maximum current when both nmos n cmos are off

hi,
see you are right that when both the transistor are ON then maximum current should flow...
But if there is something with respect to the switching then may be question is something like this...

For CMOS inverter- in which condition, maximum current flow during switching when input is from OFF (say 0) to ON (say 1) or From ON to OFF? (or similar to this)

if the question is like this then u can figure out that in both the condition there is a stage when both the transistor be in active stage for some time.. so now you have to figure out .. in which condition maximux current flow....

Just think and let me know if you got my point and if yes then may be you got reply else Let me know I will tell you... (another test for you)..

ok I confirmed from one of my frnd who had appeared along with me..the question goes like this--CMOS inverter in connected to a switching circuit. when shall it draw max current?
a)when both nmos and pmos are on
b)when both nmos and pmos are off
c)both a and b
d)none of the above.

I answeres 'a', which was wrong.. and answer given was b.So.....

You have not specified which current we are talking about. Regardless, B is false, given the question you have posed. I will explain. When both MOSFETS are off, their channels are closed. Therefore, (nearly) zero current is flowing through the gate, source or drain of either FET. ALL connections to the MOSFETS can then be treated as open circuits. Therefore, B is absolutely incorrect. Either you have misremembered the question, or the person who told you this answer was wrong.

If you are talking about the current flowing from power to ground, the answer is certainly A. When both inverters are in the active region, they form a path for current to flow between power and ground. This is called the crowbar effect and results in high power dissipation.

CMOS inverter in connected to a switching circuit.

Click to expand...

Please explain this "switching circuit." What is this? Was there a schematic provided on the test? Is it connected to the input of the inverter? Output? What does it do? Because your question is incomplete, all of the answers in this thread may be garbage, since we can't know what you're asking. Can you get the test back and give us the exact question?

no trav, there were no schematic given!! and it was not connected to ny input or output... the question was just as I posted, for sure. I also think that answer given was wrong.....

You would simultaneously solve the NMOS ID(Vin) and
PMOS ID(VDD-Vin) equations, knowing that the currents
are monotonic and the greater of the two is what sets
the through-current (so peak is where they are equal).
Of course having Vout move at the same time is a
whole 'nother dimension that is best neglected for ease.
And too, you are right on the border between linear and
saturaton, so you might be gigged about which equation.

But when I interview people I like to see a good grasp
of one particular concept, the one of "close enough".

You speak with the wisdom of many moons, dick. Mathematical formulae are an essential aspect of engineering as you suggest. Unfortunately I, like many young engineers rely too heavily on EDA tools for this aspect. I choose develop my intuitive understanding instead. If I can solve the problem from basic understanding of the phenomena, rather than solve a complicated equation, I will do so. But then, maybe my concept of "close enough" isn't close enough.

My favorite professor once told me that in his undergraduate career he too disliked the mathematical analysis aspect, a statement that shocked me since this man was a formula g_o_d. He told me that once he had some work experience he learned the value of this aspect, and went back to school with this new attitude. I only hope that I will follow in his footsteps, and in time expand my memorization of formulae, cement my ability of mathematical manipulation, and learn not to overly rely on intuition.