When adding varactor into circuit, virtuoso simulator tell an error

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karaisan

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hello! I am using cadence IC615 and MMSIM 12 with TSMC 65nm LP(OA, not CDB), in most cases they work well
but when I add varactor in to circuit, the simulator tell an error below.
(On another computer, IC51 and MMSIM unknown with TSMC 65nm LP(CDB, not OA) can run the same circuit with varactor and tell no errors, so I think it's configuration problem.)
Could anyone help? Thanks!
__________________________________________________________________

Error found by spectre during AHDL read-in.
ERROR (VACOMP-1008): Cannot compile ahdlcmi module library. Check the log file input.ahdlSimDB//bsource.va.bsource_1.ahdlcmi/Linux/../ahdlcmi.out for details. If the compiler ran out of memory, use 'setenv CDS_CMI_COMPLEVEL 0', and try again. If the reason for the failure was a syntax error, contact your Cadence Customer Support representative with the netlist, log files, behavioral model files, and any other information that can help identify the problem.
ERROR (SFE-91): Error when elaborating the instance bsource_1. Simulation should be terminated.

Opening directory input.ahdlSimDB/ (775)
Opening directory input.ahdlSimDB//bsource.va.bsource_2.ahdlcmi/ (775)
Opening directory input.ahdlSimDB//bsource.va.bsource_2.ahdlcmi/Linux/ (775)

Error found by spectre during hierarchy flattening.
ERROR (SFE-46): "/opt/IC615/pdks/CRN65LP/tsmcN65/../models/spectre/crn65lp_3d3_lk_v1d5.scs" 25030: `cgate': An instance of `bsource_1' can have at most 0 terminals (but has 2).


Time for Elaboration: CPU = 99 ms, elapsed = 440.422 ms.
Time accumulated: CPU = 1.015 s, elapsed = 1.45213 s.
Peak resident memory used = 59.1 Mbytes.

spectre terminated prematurely due to fatal error.
 

what talking this log: input.ahdlSimDB//bsource.va.bsource_1.ahdlcmi/Linux/../ahdlcmi.out ?

Maybe you need to install some packages to the system
 

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