helimpopo
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* bsim3trigger.sp--- cmos ms-trigger
.lib 'D:\Hspice\tsmc018\MM018.L'TT * Set TSMC 0.18um library
.option list node post
.tran 50p 3000p
.probe tran
+ clock=par('v(clck)')
+ data=par('v(d)')
+ q=par('v(q)')
.ic v(q)=0 $ set initial value.
* waveforms
vdata d gnd pulse(0,1.8 200p,40p,40p 1100p,2400p)
vclk clck gnd pulse(0,1.8 300p,40p,40p 600p,1200p)
vclkn clckn gnd pulse(1.8,0 300p,40p,40p 600p,1200p)
*
* top: ms-trigger
xmstrigger d clck clckn q mstrigger
cw q gnd .1f $ add wire delay
* macro definitions
**********************************
*
* n-channel mosfet
*
* drain gate source
.subckt nmos n1 n2 n3
mn n1 n2 n3 gnd NCH l=0.2u w=0.4u ad=0.2p^2 pd=0.4u as=0.2p^2 ps=0.4u
.ends nmos
*30 line
* p-channel mosfet
*
* drain gate source
.subckt pmos n1 n2 n3
vcc vcc gnd 1.8
mp n1 n2 n3 vcc PCH l=0.2u w=0.8u ad=0.4p^2 pd=0.8u as=0.4p^2 ps=0.8u
.ends pmos
*
.subckt tgate in out clck clckn
xmn in clck out nmos
xmp in clckn out pmos
.ends tgate
*
.subckt inv in out
vcc vcc gnd 1.8
xmn out in gnd nmos
xmp out in vcc pmos
.ends inv
*
.subckt dlatch data clck clckn q qb
xtg1 a b clckn clck tgate
xtg2 c b clck clckn tgate
xinv1 data a inv
xinv2 b q inv
xinv3 q c inv
.ends dlatch
*57 line
.subckt mstrigger data clck clckn qout
dlatch1 d clckn clck q qb1 dlatch
dlatch2 q clck clckn q2 qb2 dlatch
.ends mstrigger
.plot v(xmstrigger.dlatch2.q2)
.end
always saying:
**error** (d:\hspice 2010\d-trigger.sp:59)definition of model clck not found. Please specify a defined model name.
***** job aborted
.lib 'D:\Hspice\tsmc018\MM018.L'TT * Set TSMC 0.18um library
.option list node post
.tran 50p 3000p
.probe tran
+ clock=par('v(clck)')
+ data=par('v(d)')
+ q=par('v(q)')
.ic v(q)=0 $ set initial value.
* waveforms
vdata d gnd pulse(0,1.8 200p,40p,40p 1100p,2400p)
vclk clck gnd pulse(0,1.8 300p,40p,40p 600p,1200p)
vclkn clckn gnd pulse(1.8,0 300p,40p,40p 600p,1200p)
*
* top: ms-trigger
xmstrigger d clck clckn q mstrigger
cw q gnd .1f $ add wire delay
* macro definitions
**********************************
*
* n-channel mosfet
*
* drain gate source
.subckt nmos n1 n2 n3
mn n1 n2 n3 gnd NCH l=0.2u w=0.4u ad=0.2p^2 pd=0.4u as=0.2p^2 ps=0.4u
.ends nmos
*30 line
* p-channel mosfet
*
* drain gate source
.subckt pmos n1 n2 n3
vcc vcc gnd 1.8
mp n1 n2 n3 vcc PCH l=0.2u w=0.8u ad=0.4p^2 pd=0.8u as=0.4p^2 ps=0.8u
.ends pmos
*
.subckt tgate in out clck clckn
xmn in clck out nmos
xmp in clckn out pmos
.ends tgate
*
.subckt inv in out
vcc vcc gnd 1.8
xmn out in gnd nmos
xmp out in vcc pmos
.ends inv
*
.subckt dlatch data clck clckn q qb
xtg1 a b clckn clck tgate
xtg2 c b clck clckn tgate
xinv1 data a inv
xinv2 b q inv
xinv3 q c inv
.ends dlatch
*57 line
.subckt mstrigger data clck clckn qout
dlatch1 d clckn clck q qb1 dlatch
dlatch2 q clck clckn q2 qb2 dlatch
.ends mstrigger
.plot v(xmstrigger.dlatch2.q2)
.end
always saying:
**error** (d:\hspice 2010\d-trigger.sp:59)definition of model clck not found. Please specify a defined model name.
***** job aborted