4T SRAM is the simplest unit cell design. A 4 bit SRAM
would have (4) 4T (or 6T) bit cells (plus write and sense
overhead, etc.). 4T cell may or may not be more compact
than 6T, depending on how you get your pullup resistor
built. You would want a very high value, which is usually
much fatter than a minimum geometry PMOSFET. The
main virtue of 4T cells being that you can build them
without PMOS (for what little that's worth in the modern
era). A resistor built up in the interconnect stack
somewhere, could make a compact 4T design by a 2.5-D
sort of layup. But this is specialty-flow territory, in case
you were imagining integrating a RAM block in vanilla
CMOS.
Now I'm fairly confident that Mr. Go0glEz would serve
you up plenty of pictures from a '4T SRAM' and '6T SRAM'
keyword search.