Re: QPSK modulator
Why should you desire to operate the signal processing for the QPSK modulator at 500 MHz?
More important to know before answering your question is what is the maximum symbolrate you try to achieve? Symbolrate and occupied spectrum are related. The only reason why you should try to run at 500 MHz is when you want to implement the DDS into your design and want to generate your spectrum to approx 250 MHz and below. However, there should be other ways which are easier to do. Personally given the processing power of current FPGA's and the required signal processing you have to do it will be impossible to accomplish this task in an FPGA.
Try to relax your design goals. I have made a QPSK modulator baseband design which runs at 100+ MHz. That is more realistic.
Regards
Added after 4 minutes:
By the way, a follow up to one of your questions... you asked for DSP or FPGA.
Believe me... don't use software DSP's for this task. DSP's are nice for flexibility but lot of tasks are performed in a serial manner.
For fast signal processing you need parallel processing which can be done with FPGA's... Altough I doubt if you can use such complex processing at 500 MHz.
And if you can do it at these clock speeds, then it will require a lot of pipelining and therefore large FPGA designs...
Regards