In a few words, characterization of a library of asic cells is the process of building timing/power informations in a standard format (lib, tlf, verilog) starting from spice netlist.
HSpice and SmartSpice are some of the spice tools that contain useful commands for characterization. There are also tools that automate the entire characterization process.
DynaCell is a characterize tool of Circuit Semantics(CSI), you may use it to do library characterization. Hspice can do this job as well, but you should write a good script to simplify ur manully work. perl script is a solution, as well as Tcl.
a vendor used to say to me, some characterization tool is only a huge script.