In general, Flash reading is possible up to the maximum clock speed, with no other restrictions. Writes always occur in full pages. Even if you only modify a single bit in a page, once you deselect the chip or move to a different page then the full page is rewritten internally, taking 23ms.
Due to this behavior, you might need to put some extra thought into the way you deal with Flash in order to get not only acceptable speed, but lifetime too. Consider a data logger that records one byte per second sequentially to a Flash. The most straight-foward implementation of allowing the page write to occur after each byte is written, would cause 256x more wear on each page than necessary. It would be better to cache bytes in RAM, writing only when a full page is accumulated. In addition, you may want to detect disconnection or loss of the main power source, trigger a flush of the partial cache should this occur, and ensure the regulated supplies can maintain their voltage for the 23ms required to complete the write.
EEPROM works the same way. Not sure about DDR.