What is this spectreVerilog error?

Status
Not open for further replies.

snfvsd

Junior Member level 1
Joined
Sep 13, 2010
Messages
16
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,419
Hi I am new to using spectreVerilog simulator and doing some top level sims on an ADC in CADENCE 5 environment. I have some verilog, veriloga and schematic cellviews.

I have just selected spectreVerilog and selected transient analysis. And on running I get the following error in the icfb window:
End MS netlisting..
..successful
Compose simulator input file..
..unsuccessful

I have tried looking through the simulation folder, but there does not seem to be any information on how to debug this further.
Has anyone else seen this error, or has any ideas on how to proceed?
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…