What is the Total Negative Slack

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Serwan Bamerni

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Hello everyone

I am new using Vivado, where I used to use ISE suit design

when I synthesize my design, to calculate the max frequency that may the system work, I get only two parameters in timing report which are

Worst Negative Slack and the Total Negative Slack

what do these two factors mean?

and do these parameters related in somewhat to the maximum frequency that a system can operate, and if not where can I find the maximum frequency

thanks in advance
 

Total negative slack is the added up value of all the path negative slacks for every endpoint. e.g. if you have three failing paths that have -0.1, -0.2 and -1.1 then the total negative slack is -1.4 (-0.1+-0.2+-1.1)
in this example the worst negative slack is -1.1 which is the biggest negative slack value (i.e. the path with the worst violation).

If you don't provide any clock constraint then you shouldn't even get a result (or the result is 0) for slack as Vivado won't try to run STA on the design.
 
Ok, that is good, but now, how can I know the worst negative slack in my design

For your information, I made my design in Xilinx system generator and then obtained the reports in Vivado
 

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Serwan Bamerni said:
Ok, that is good, but now, how can I know the worst negative slack in my design

For your information, I made my design in Xilinx system generator and then obtained the reports in Vivado
Click to expand...

just check the timing reports in vivado.

edit: it took me 10s to find it in the report you attached. please at least try.
 


maybe your processor is faster than my processor

:grin: :grin: :grin:
 

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