If my understanding is correct, you need a CMOS switch for your comparator.
In this case the key point is to make sure there is low distortion and acceptable delay. As a rule of thumb, equal size with minimum length is a good choice. After some calculations/simulations, you will find the optimal size for NMOS & PMOS.
If my understanding is correct, you need a CMOS switch for your comparator.
In this case the key point is to make sure there is low distortion and acceptable delay. As a rule of thumb, equal size with minimum length is a good choice. After some calculations/simulations, you will find the optimal size for NMOS & PMOS.
From real life experience, if you want to have close to equal rise and fall times, the ratio is from 2:1 to 3:1 in favour of the pmos. Which means at the same L the W of the PMOS should be between 2 and 3 times biger than the NMOS
i believe you will not drive significant loads with your mux, in which case, if i were u, i would use the minimum size permitted in your process for both n and p in the mux to allow higher integration.
i believe you will not drive significant loads with your mux, in which case, if i were u, i would use the minimum size permitted in your process for both n and p in the mux to allow higher integration.
that's true. You'll have to use something else after it. My point was only for a regular inverter type. Anyway, I am not sure what exactly the application is in his case
Added after 1 minutes:
also depends if it is analog or digital mux (i guess it's digital)