What is the difference between these two designs?

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samy555

samy555

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I know that the design fig.2 safes battery more than fig1, and that have greater input impedance?
Are there differences that are more important?
Thank you



My question is what is the difference between the two designs, one of them has (1mA, 1.5V) operating point and the other has (0.1mA, 1.5V) operating point?
On any base or on what basis is operating current selected at a certain value?
It may be 100mA, 10mA, 1mA or even 0.1mA
I understand that the value of VCE must be equal to half the value of the battery in order to get the symmetric swing of a resulting signal?
 
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No, this is not what I'm asking for

Suppose that someone studied electronics, and understand the use of equations and calculations for a design
Now he wants to design a circuit that preamplify small signal from a mic (Mic signal about 10mV) using one of the above circuits
the two circuits do the job
My question was on what basis is operating current selected at a certain value?

thanks alot
 

Collector current will affect the input impedance which would be a factor in the design.

Keith
 


Are there any other advantages or disadvantages of the use of large or small ICQ?
 

You generally use as small a collector current as will give satisfactory operation in you circuit. But small currents mean higher collector load resistors and the resulting high output impedance has to drive the load impedance (including any stray capacitances) at the highest signal frequency of interest. That is usually the limiting factor for how low in operating current you can go.

Another factor may be circuit noise. Higher value resistors have higher thermal (voltage) noise and you want to keep that below any signal noise.
 
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    samy555

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This was the best answer I've ever so far, so thank you
Now, please look at the first design Figure 1, its operating point is (1mA, 1.5V) and Zin = 2.15K Zout = 1.45k
For the second design Figure 2, its operating point is (0.1mA, 1.5V) and Zin = 21.5K Zout = 14.5k
I think that if i use one of them as a 1st stage then repeat it as a 2nd stage i'll get the same division ratio of the signal voltage between the two stges, so the second is better.

For the higher value resistors noise yes I agree with you
thank you very much
 

I am not sure where you get those input impedances from but they don't seem right.

Bandwidth will be affected by the current in the transistor as well as the resistor choice.

Keith
 

Search for ' bandwidth of common emitter amplifier'. Something like https://www.learnabout-electronics.org/Amplifiers/amplifiers14.php might be helpful.

There are plenty of explanations of common emitter amplifiers on the internet.

While you original question is valid, it makes some assumptions about the design such as the operating point, the basing method and lack of emitter resistor. Designing an amplifier will normally be based on requirements such as bandwidth, current, gain, voltage swing, gain stability, input and output impedance etc. From those requirements the appropriate design is chosen and the operating point and number of gain stages selected.

Keith
 

Samy555,

I am a bit surprised that - up to now - the influence of the collector current Ic on the gain of the stage was not mentioned.
The transconductance gm that gives - together with the collector resistor - the gain of the stage (without emitter feedback) is proportional to Ic.

We have: gm=Ic/26mV

and the gain G=-gm*Rc.

In case of a emitter degeneration (Re feedback) - as proposed by Keith the gain expression is: G=-Gm*Rc/(1+gm*Re)
 

I have read all what is stated in the PDF file
Is not mentioned a word about the relationship between ICQ and bandwidth!!
can you please give me more help.
thank you very much
What you said is true in the case of a particular design and we change ICQ
I did the calculations so that the ratio between RC and re remain fixed even if ICQ changed to any value.
thank you very much
 

samy555 said:
...... so the second is better.
Click to expand...

Yes - I agree with this choice. I also would prefer the second design - mostly because of the higher input resistance and lower power dissipated.
The price for this choice - a larger output resistance - can be accepted, I think.
 

I am a bit surprised that - up to now - the influence of the collector current Ic on the gain of the stage was not mentioned.
Click to expand...
I think that's because both circuits have almost identical gain, Rc is scaled with Ic respectively (inverse proportional).
 

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