What is the difference between TestPoint Insertion and DRC violation fixing?

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lookthemoon2007

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Hi

Can anyone explain in detail "What is the difference between TestPoint Insertion and DRC violation fixing? "

This is one of the interview question asked to my friend.


Thanks in Advance.
 

Test point insertion is to add flip flop for scan testing.
DRC means design rules check, and there are some DRC for the ATPG, for layout.... Which one your questions is related?
 

Test point insertion is related to make the unobservable or uncontrollable logic to make observable and controllable by adding a mux where the control signal is Test enable.
Test point insertion is not to add a flip flop please correct me if i am wrong.

DRC is design rule check i agree with you. Here i am talking about ATPG DRC.

My doubt is during DRC phase does the ATPG tool add these test point into the netlist to improve the coverage or is the test point insertion done by us.
 

Yea.Test point insertion is not to add ffs but the conversion of normal ffs to scan ffs if we are using muxed ff scan style.

During ATPG DRC, ATPG is not supporting for adding any logic in the design, for adding purpose, we have to use synthesis tools. it's just checking that, in test mode the clock and reset pins are controllable for all ffs..
This is one type of DRC. There are so many other types of DRC as well.

During ATPG, if the DRCs solution is to add something logic in design, thn again we need to add required logic through synthesis tool.
 

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