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stu ans:
The delay is due to the fact that information can travel at most, the speed of light, and in reality, the time it takes to do the computation is not infinitely quick
The delay of any gate is caused by its parasite capacities. You can calculate delay on two ways. You can connect two gates of same type in serial or you can connect some capacity on the output. It has nothing to do with signal traveling speed. The thing is that you have some parasite capacity in your transistors, which need some time to charge or discharge...
U can find XOR gate delay by connecting them as a ring inverter with one input of all XOR gate at logic '1'....and other input connected to output of previous gate and so on....better to have 13 or 15 gates to get accurate time (all odd number)....
Γp=time_period of output waveform/(2N)....where N is the number of gates....
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