Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What is the best method for PCB layer stacking?

Status
Not open for further replies.

guybrush

Junior Member level 3
Junior Member level 3
Joined
Oct 13, 2004
Messages
25
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
233
fast signals inner layer ground plane

I all.
I'm designing a digital board with 2 power planes, a ground plane, 9 signal planes.
Which is the best approch for the stacking of these planes? Is there any book adressin the problem of layer stacking in order to minimize EMC/EMI and to have the better SI?

Thank you
 

Re: PCB layer stack

Hi guybrush

As I understand you are planing for 12 layer structure.

remark: I do not know about books - I red some articles - but cann't seem to find them now.

I can lay some good rules if you want, but first - please specift how fast are the signals you are going to rout ? are they differential? What is the return path (the real direction that the signal return)? Is it filtered (filtered lines need some altering of the reutrn path)? and there are some more that I'll gladly help you with.

Some good rules:
* Try to "BOND" the power layers and the GND layers in a very tight format (for example - layers 2,3,4 will be +3.3,GND,5v) with very thin prepreg/core (4mil and less) - you'll get a capacitance that will help reduce bouncing of the planes.
Try to implement some good engineering rools: I.E. - you will probably need more than 3 layers of power if high nomber of fast signals (fast is a measure of rise time and not frequency). Remember that the best way to "shield" a signal from EMI problems is to bury it between power layers.

* Differential signals do not exibit much EMI problems - you can - in need - put them in external layers.

* If a large board - please remember to place a noce dispersion of decoupling capacitors between GND and Power - spread in a grod of 2 to 4 CM (depends on the highest frequecy on board).

Shutter_man
 

PCB layer stack

In my option, the ground is too little , and general speaking, the plane layer should be even. So I think you may reduce one signal and use it as one ground layer or you may add one signal lay and one ground layer. Namely make a fourteen-layer board.
 

Re: PCB layer stack

It sounds like you are in over your head with this design. I don't mean that as an insult; however, you seem not to understand the many factors that drive board stackup.

First, to prevent board warpage and twist, it is usually a good idea to keep the number of planes even and the number of signal layers even. They are arranged about the central core of the board in symmetric pairs. This is a mechanical consideration.

Next, to prevent signal reflection, you control impedance on the signal traces carrying fast risetime or high frequency signals. This is done by either making the signal paths broadside or edge coupled differential pairs, or by referencing the traces to an adjacent plane. The width of the trace, the permitivity of the board dielectric, and the spacing between signal trace and its return path on a plane or parallel trace will determine the trace impedance.

Next, to improve noise rejection on the power planes, it is frequently a good idea to close-couple the power plane to a ground plane. Distributed decoupling capacitors may also have to be employed depending on the types of devices, risetimes, and signal power levels.

Next, you must consider the unwanted cross coupling that can occur if there are parallel traces on adjacent layers that are not intended as differential pairs.

Next, you must consider the return paths on the planes. You do not want high energy and/or fast risetime signals sharing a return loop. If they do, you will modulate one signal with the other on the return side - you lose signal integrity.

Next, you must consider radiated signals. Some fast and/or high energy signals may have to be buried on an inner layer with adjacent planes to shield them from coupling to external structures or devices. This will be very important if you are to pass EMC testing. Other techniques may be necessary to prevent radiated interferrence - such as ground via stiching. Burying certain signals may also be required if those signals are very sensitive and need to be well shielded from outside interference.

There are many considerations that depend on just what you are trying to design, signal strengths, frequency, mechanical considerations, product test requirements, manufacturability, etc.

There are several books that I can recommend, but none of them is a cookbook that will tell you how to stack a board based on the number of desired layers. The number of layers is generally the result of careful layout planning for specific board performance.

As a start, you could take a look at the books listed on the following:
**broken link removed**
**broken link removed**
 

PCB layer stack

You must use the balance PCB Layer
 

Re: PCB layer stack

it depands on your application
high speed, video, analog, power ...

each application has its demands

regards,
kobik
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top