what is synthesizable

[moh_monem43]

hello
i don't understand this statment
Real : real number ranging from -1.0E38 to +1.0E38 . not synthesizable.
synthesizable and not synthesizable . what means this words??
thanks

 

[Harmasha]

Hi Friend,

In field of VLSI ,
the word synthesizable plays a key role.

Actually whatever design code (RTL or structural) that you write is converted into a synthesizable netlist, Where your modular approach becomes a connected gate list.

i.e. Suppose you write a RTL code for adder,
then this adder becomes a list of logically connected gate list (XOR, AND, etc ) which can be automatically implemented using tools...

Now codes that can be converted to a valid netlist for generating the hardware are said to be synthesizable..

In digital logic the concept of real numbers is not valid, for we have the logics as the two basic integers 0 and 1.

Even the IEEE standardized concepts of Strong/ weak signals donot go into the fractional or decimal point value of the number. Thats why it is not synthesizable.
Hope you are clear now.

 

[haytham]

Synthesizable means that it could be mapped to a hardware circuit.
Real data type are not synthesizable beacuse decimal point represntation in H/W is not confined.

Thanks
Haytham

 

[delay]

Means the HDL code can be translated into physical circuits such as shift registers, counters etc. which may or may not be functionally correct.

Most synthesis tools for FPGAs do not support real numbers.

 

[salma ali bakr]

well, it's as if the tool is converting your RTL into a structural form or a netlist of gates...according to its own rules...

 

[Bus Master]

So, what if this is essential for the program flow? how to overcome this obstacle?

 

[quy1001]

Dear Friends.

Use fixed-point number only for real number problem.

It is enough for everything.

 

[anilkumarv]

Synthesizable means converting your HDL into actual components (like gates,flops etc)
For example you write a code in verilog :
and(d,b,c);

This sentence "synthesizes to" an And gate, that is, this sentence results in creation of an AND gate.
It means c and b are the inputs for the and gate and d is the output.

 

[funster]

synthesizable means a RTL can be teansform inlto hardware by synthesis tools

such as DC.

best regards

hello
i don't understand this statment
Real : real number ranging from -1.0E38 to +1.0E38 . not synthesizable.
synthesizable and not synthesizable . what means this words??
thanks

 

[Harmasha]

Hi,

DC you mean direct currnet. It is an analog value and how you can model it directly without any process of rounding or truncating. Can you kindly come up again in detail.

 

[dcreddy1980]

DC means Design Compiler, a tool from synopsys which converts u r RTL to gate level netlist(mapped to u r technology cells)

 

[lucbra]

If you really need to deal with real numbers (most often you can work with integers or two's complement), then you will need to take care of the different bits and pieces yourselve (sign, mantissa, exponent).

I can assure you that this is really complex for beginners and even experienced programmers try to avoid it as it slows down the system performance. But if you really need the dynamic range, well, no other option then.

Success with your project