can any one tell me what is the meaning of output capcitance of CMOS.
i am designing CMOS multiplexer....
i want to find the Co of that cell...
is is depend upon the load capcitance CL?
It comes from CJ0 and CJSW(junction capacitance of transistors' drain). their value can be found in .model card of the process.
larger transistors can drive larger load capacitances but they have larger output capacitance. smaller have lower output caps but they have lower driving power. therefore thereis a optimum transistor size for the fastest response time which depends on "load capacitance", "process minimum feature size" and "VDD".
It contains the gate capacitance which can equivalent to the output to ground capacitance by miller effect, the diffusion capatance,the wire capacitance ,and the load capacitance.
can any one tell me what is the meaning of output capcitance of CMOS.
i am designing CMOS multiplexer....
i want to find the Co of that cell...
is is depend upon the load capcitance CL?
It is normally the output capacitance of the cmos device...(it can be input capacitance too)....it can affect the switching time...(and rise time of a driving signal).... and it is normally very low....or designed to be as low as practicable......it depends on the cmos construction of the device and the load it is driving. lower impedance or low resistance loads should decrease .....higher impedance or resitive load increase this capacitance.
It is important but if you are driving another device of the same cmos family it should be taken care of as far as timing is concerned......if you are driving a transistor for example then it does become importantant.
when u design something like the multiplexer, u have an output terminal, from this terminal u find some parasit capacitances like Cgs, is the most representative. Co is the capacitance thet your transistors must to charge to get the response on the output, and those capacitances comes from parasit capacitances.