*.lib contains the standard cell information, but only the timing information of the cells. This is used during the synthesis and STA phases.
LEF file has the physical information of the std.cells. Some lef file have the physical information of the pads as well. This file is used during the P&R section.
SDC or synopsys design constraint files are used to constraint the design. This file is used to get the netlist of the design and is further used during the P&R phase as well.
Netlist.v, as u know, is the file you get out of synthesizing the RTL file to a particular library(*.lib file).
Incase if you need any particular information about any of the files, please post the question.