What is ILM(Interface Logic Modelelling)

[coolrak]

Hi everybody,

Could someone educate me what is ILM exactly.

Thanks in advance

 

[dr_dft]

It is a gate level model of a physical block normally used in hierarchical design flows. In this model, only the connections from the inputs to the first stage of flip-flops, and the connections from the last stage of flip-flops to the outputs are in the model (including the flip-flops and the clock tree driving these flip-flops). All other internal flip-flop to flip-flop paths are stripped out of ILM model.
When the chip becomes very large, sometimes it takes too long to run static timing analysis on the full chip. The way to get around this problem is to run STA on the block level for intra-block paths, and then run a chip level STA for intra-block paths.
An ILM model of the block is used for the intra-block level STA run.

 

[Prasanna Kumar]

Well Coolrak,

By dividing a design into multiple blocks, each hierarchical block can be worked on individually and in parallel, from RTL through physical implementation and working with smaller blocks keeps tool runtimes short and in u must do the block level timing closure as well.

Once timing closure has been achieved on all hierarchical blocks, these blocks are integrated to create the final chip implementation. To speed up this process on larger designs you can model the blocks as Black boxes .These black-box models u call them as INTERFACE LOGIC MODELS.

Hope this has cleared ur doubt

rgds
prasanna