Even simpler, the voltage drop across a fully saturated NMOS is the threshold voltage. So if you have a Vdd of 1.2V and a 2 input nand gate (2 nmos in series) each with a threshold voltage of 600mV, then theoretically your NAND gate will work. Now what if you wanted a 3 input NAND gate - there is not enough head room to allow for this, since you need 1.8V. If the threshold voltage was 400mV thenm you might just get by but what if you wanted a 4 input nand gate? etc.