Re: ring buffer
louislu,
A ring buffer is a series of registers. Upon receipt of a clock, the contents of each register is shifted to the next register. Data from the last register in the chain is transfered to the 1st register in the chain. Hence, the name "Ring Buffer"
For your application, a FIFO (First-in-first-out) memeory chip should do the job. Data from the input UART (or other receiving device) would be written to the FIFO. The transmitting UART (or other transmitting device) would read the data from the FIFO for transmission at a different clock rate. You have to be careful, though; If the input clock is faster than the output clock, the FIFO will overflow, unless there is a sufficiently long pause between bursts of transmission at the higher input rate to allow for the FIFO to "flush".
Regards,
Kral