[SOLVED] What is a read latch and Write latch in processor/controllers device operations?

pjamu · Feb 14, 2013

I came across timing diagrams with 2 different aspects-

- One with 'Write latch set'
- Another With 'Write Latch 'not set.

What does 'Write Latch' mean?

Also what is the double "S" in timing cycles?( In the file attached)

chuckey · Feb 14, 2013

Most memory bus set ups, require that a pin called "write" must be set for the duration of the writing process. With a write latch, the write control signal just pulses the "set" line and at the end of the writing process, then pulses the write "not set" line.
The SSs, just show an indeterminate time, the space between the Ss, can be of any time period.
Frank

pjamu · Feb 15, 2013

Thank you. That was concise.

[SOLVED] What is a read latch and Write latch in processor/controllers device operations?

pjamu

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chuckey

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pjamu

pjamu

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[SOLVED] What is a read latch and Write latch in processor/controllers device operations?

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