xilinx ddr register
That's a Double Data Rate register. It has two clock inputs, and behaves like a very fast two-bit parallel-to-serial or serial-to-parallel shift register. Twice as fast as a regular register. One common way to clock a DDR register is to feed it your regular CLOCK and inverted-CLOCK.
In many FPGAs, DDR registers are available only at the input/output pins, but they are still very useful for communicating with a fast external device such as a DDR SDRAM.
Here are descriptions of Xilinx input and output DDR register primitives (named IFDDRCPE and OFDDRCPE) available in some FPGAs:
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The DDR register details vary between different FPGA types, so read your specific FPGA data sheet.