What happened if Multi-master and Single-master devices are connected with a I2C Bus?

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muthukumar_ece2004

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In our project, we have connected Battery Pack, Controller and Charger IC I2C lines together. This causing un-interrupted error (Data line pulled to Low). Controller is a Multi-master device, Charger IC is a slave device and Battery Pack is a Single-Master. Is this is the issue due to connection of Multi-master and Single-master in a single Bus?
 
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Which one is pulling the line low? Can it be a bus collision error?
 

We could not able to predict the device which holds the line. Can you able to get the answer for your question from with the help of connection of multi and single Masters with a same bus.
 

I don't know what happens if both multi and single Masters share the same I2C bus. But a possible step towards the solution to your problem would be to try every combination to find out which device pulls the line low. Maybe disabling the pullup resistors one by one may reveal which one is failing when the line is pulled low.
 
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    FvM

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Battery Pack is a Single-Master
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Sounds unlikely. A battery pack is usually an I2C slave, not master. Anyway, a master not pepared for multi-master operation must be expected to fail when it's connected to a bus with another master constroller.

I2C bus deadlock may also be caused by a slave after an unexpected sequence, e.g. from a wrongly behaving master. There's a suggested recovery sequence published by NXP to enforce a bus release in AN10216-1.
 

FvM said:
I2C bus deadlock may also be caused by a slave after an unexpected sequence, e.g. from a wrongly behaving master. There's a suggested recovery sequence published by NXP to enforce a bus release in AN10216-1.
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yes FVM, we are facing deadlock problem. Once the bus behaves improperly, then the communication is failing by locking the bus by one of master or something. Thanks for the solution suggested by you. I will look in to the application note.

FvM said:
Sounds unlikely. A battery pack is usually an I2C slave, not master. Anyway, a master not pepared for multi-master operation must be expected to fail when it's connected to a bus with another master constroller.
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We are using Smart Battery Pack (TI's gas gauge) which is specially designed for the TI charger IC. So all the parameters like Charging Voltage, current and temperature controlling options are managed by the Battery Pack. So that Charger IC act as slave whereas Battery Pack act as Master. Also the processor is not required to control/monitor the Battery Pack information since Battery Pack itself monitor and control the charger functions. we have some requirement to log the Battery Pack information, so that we are connecting this I2C bus with the processor.
 

You can't monitor an I2C bus by connecting another master. You have design a special monitoring software thats listens passively to the communication.
 

I understood that monitoring means listening to the battery pack to charger communication. If you want to request data from the battery pack, which is a I2C master according to your informations, I assume that it's simply impossible. If the data sheet suggests otherwise, please tell the chip type or give a link to the datasheet.
 

FvM said:
I don't think that bq20z75-V180 is a SMB/I2C bus master.
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Following are the information given in the datasheet
"COMMUNICATIONS
The bq20z75-V180 uses SMBus v1.1 with Master Mode and package error checking (PEC) options per the SBS
specification"
I don't know how you say this will not act as a Master. Please share your view.
 

Yes there are some words in the datasheets that might be understood as describing a master device. But I didn't see a single word describing actual master functionality.

Where did you find a description of the said M/S role of battery pack and charger IC? It's apparently not in the datasheet.
 

Yes Multi/Single master description is not available in the datasheet. But i got those information from TI Community forum in which we have posed as a query.

Battery Pack will lost arbitration if the Processor (Mulit-master) tries to communicate with the charger IC.

But anyway good information is we have solved this problem by reducing the I2C clock timing of the processor. So that, before Processor capturing the I2C bus (during power-on or reset), Battery Pack capture the I2C bus and communicates with the Charger IC. But the risk is again it may locked at any of intermediate operation. We hope it will not since the processor only used for reading the data from the Battery Pack.
 

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