Re: Another I2C question
Hi all,
My opinion:
SDA pin is not always managed by the I2C Master device. Master device manages SDA and SCL according to I2C state (START, STOP, ADDRESS, DATA, etc...), but sets SDA as INPUT to receive ACK/NACK condition from Slave. This extrange low level in SDA happens when Master changes SDA from OUTPUT to INPUT (high impedance) and slave changes from INPUT to OUTPUT to generate the ACK/NACK condition, as Slave sets SDA high or low according to ACK/NACK condition.
Regards.