Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What does this signals in I2C bus mean?

Status
Not open for further replies.

burningmosfet

Member level 1
Member level 1
Joined
Sep 13, 2010
Messages
38
Helped
3
Reputation
6
Reaction score
3
Trophy points
1,288
Activity points
1,579
hello everybody, i would like to make a question on I2C bus

In the first and in the second images (yellow SCL & red SDA) we can see the two strange signals in the red circle. What are they? If the first could be explained with a release of the line from the master and suddently the slave give an ACK, how can be explained the second image??? 8-O


First img
ImageShack® - Online Photo and Video Hosting

Second img
ImageShack® - Online Photo and Video Hosting
 

Re: Another I2C question

I think it is just a noise and can be neglect by the device
 

Re: Another I2C question

Generally, the SDA level during SCL high state is meaningless in I2C communication. Furthermore, the maximum low level is 1.5V, so the said signals would be ignored anyway. They look like generated by a bus translator or a somewhat strange acting I2C device. Industry standard devices won't generate it, I think. But you don't need to worry about it.
 

Re: Another I2C question

Hi all,

My opinion:
SDA pin is not always managed by the I2C Master device. Master device manages SDA and SCL according to I2C state (START, STOP, ADDRESS, DATA, etc...), but sets SDA as INPUT to receive ACK/NACK condition from Slave. This extrange low level in SDA happens when Master changes SDA from OUTPUT to INPUT (high impedance) and slave changes from INPUT to OUTPUT to generate the ACK/NACK condition, as Slave sets SDA high or low according to ACK/NACK condition.

Regards.
 

Re: Another I2C question

I agree, that both intermediate level pulses seem to happen before an acknowledge bit, each. But you would expect a spike to Vh, not a flat 1V pulse. It would be interesting to see the NACK waveform in this place.
 

Re: Another I2C question

If i have not misunderstood what jalonso says it seems that my microcontroller has setted the input pin as input & pull down (and not high impedance as should be); i had this suspect but the pull-up/pull-down resistor of this mcu are approximatively 40kOhm and the pull up resistor on the I2C are 10kOhm so the voltage of 1V should be 4V.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top