What does speed grade mean?

[rakesh_aadhimoolam]

what exactly we mean by speed grade....

while running LEO_SPEC we were able to set speed grade but what does -ve sign as well +ve sign indicate.....

thank you

 

[salma ali bakr]

Re: SPEED GRADE

The lower the -X the faster the FPGA. The speed is specified in terms of the tpd (pin-to-pin delay) parameter in the FPGA datasheet. This affects the maximum operating frequency of your design in that particular FPGA.

 

[ilikebbs]

SPEED GRADE

For cpld, the lower the faster. It represent the delay of pin-to-pin.
For Xilinx fpga, the bigger the faster.
It does not represent the delay of pin-to-pin.

 

[salma ali bakr]

Re: SPEED GRADE

well i guess there is a mess up in that cause of the negative sign...

for CPLD, if the number itself(without the sign) is lower then the device is faster
so a -2 device is faster than a -3 device

for FPGAs, if the number itself (without the sign) is lower then the device is slower
so a -5 device is faster than a -4 device

sorry for the messup i may have caused
thanks
Salma

 

[tkbits]

Re: SPEED GRADE

The sign is actually punctuation called a "hyphen", which some of us also call a "dash". On the Xilinx FPGA, the speed grade is printed on the chip on a separate line, without the hyphen.

 

[Matrix_YL]

SPEED GRADE

According to my experience description of speed grade vary with company of FPGA producer.Altera is quite different from Xilinx.
more smaller more faster( device 4 is faster than 5)