Re: speed of logic ciruits
Older logic types (RTL, DTL) use junction transistors in the output stage with resistor pullups. Speed limiting factors are:
. Transistors take time to come out of satuaration.
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. Resistor pullup has limited output current capability.
. This limits the speed at which the output staqge can charge
. a capacitive load.
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TTL families typically have "totem pole" outputs in which the pullups and pulldowns are both active devices. This increases the capacitive drive capability, and thus the speed in swithching for "0" to "1". However they still suffer from the long time required to come out of saturation.
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STTL, LSTTL, ASTTl, etc have Schottky diode clmamps in the output stages that prevent the devices from going into saturation, and therefore don't suffer from the "unstauration" time.
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CMOS devices use complementary CMOS transistors in the output stage. MOS devices are majority carrier devices, and therefore do not suffer from the saturation problem of Junction transitors, which are minority carrier devices.
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ECL devices are current mode devices that are always operated in the linear region, and therefore do not suffer from saturation problems. Also, the voltage swing is very small, so the load current due to a capacitive load is small. The downside is that the use a large amount of current.
Regards,
Kral