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I think you may decap the plastic(or ceramic) IC package and then use the electron microscope to see into the chip.
Although it's a way for looking inside the chip, it would better that you have already localized the problem. Otherwise, the chance to find the melted spot is very small.
By the way, the first thing you can do is: do the basic ESD test of the chip.
For example, pin-to-VDD, pin-to-VSS, pin-to-pin, ...etc. to find out what is the problem. If it damages the I/O pad, then you can find the specific pin will not work. And if it damages the internal CORE, then you might see some function is error or the propagation delay is too long.
In the second case, it's harder to find the problem.
So, do the ESD plan while floorplanning is very important. The PAD ESD tolerance does not imply your chip's ESD protection capabilitty. Whole chip ESD protection is much important than individual PAD ESD protection.
you dont need an electron microscope, just use a optical micro and carefully watch the pads if there are protections or not (note also reduced esd protection is possible). if latchup is the cause, maybe its easy to see tiny plastic particles melted on the surface of the bondwire ...
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I think you may decap the plastic(or ceramic) IC package and then use the electron microscope to see into the chip.
