quaternion
Full Member level 4
- Joined
- Nov 12, 2006
- Messages
- 212
- Helped
- 17
- Reputation
- 34
- Reaction score
- 7
- Trophy points
- 1,298
- Location
- Cairo , Egypt
- Activity points
- 2,828
quaternion said:What about the gain and stability in closed loop circuits as LDO?
In the Millikan paper "Full on chip CMOS LDO",He had used current mirror OTA ,what are the advantages he gained from this?
He has added nmos transistors below the pmos transistors in the second stage in order to adjust the inaccuracies and mismatches that are magnified by the disturbance added by the compensation circuitry ,How does this affect the performance of the current mirror OTA & how does this result in a better DC offset immunity?
s_babayan said:Dear Friends
In a paper I studied that since current-mirror OTA has small-node impedancxe, the poles are so large so that a fully-differential current-mirror OTA doesn't need Compensation scheme, so as it consumes a lot of power and area in compare with conventional OTA. Good luck
i doubt that.quaternion said:What are the advantages of current mirror OTA ?
Could it be considered a good topology for LDO error amplifier -at least as a first stage-(I have saw it in some papers but without reasoning for its usage)?
What I know is that it has a larger output swing & 1 pole-& the other is at high frequencies- (although composed of 2 stages).Also, it can be fully differential without the need for common mode feed back.
I need confirmation about these.
What are its disadvantage ?
Any recommended papers or .. .
safwatonline said:i doubt that.quaternion said:Also, it can be fully differential without the need for common mode feed back.
I need confirmation about these.
yep, the first stage is diode connected loaded (low impedance) but the second u will need CMFB cause of the high impedance at the output.quaternion said:safwatonline said:i doubt that.quaternion said:Also, it can be fully differential without the need for common mode feed back.
I need confirmation about these.
I think for the 1st stage alone that holds(whenever the ICMR is in a certain range) , while for for the second stage I am not sure .
quaternion said:He has added nmos transistors below the pmos transistors in the second stage in order to adjust the inaccuracies and mismatches that are magnified by the disturbance added by the compensation circuitry ,How does this affect the performance of the current mirror OTA & how does this result in a better DC offset immunity?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?