Weird Problem -- Spartan3

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cmos babe

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Hi,
I have a design that consists of a cpu and a hex to seven segment decoder.. the input of this decoder is connected to a nybble of the databus which is 32 bit wide... i wrote a program that transfers data from memory to a register, then it sends this data to the decoder ..for example if i want F to appear on the seven segment display i should send 0000000F ....the problem is this doesnt work unless i include more ones in the word. so, to get an F i should send FF000000F! and if I remove these extra one's I get a wrong result...anyone has an idea what's this caused by ? This problem doesn't appear in the behavioral simulation.
 

I've just found that there are some glitches in the post place and route simulation....can this wrong behavior be caused by the glitches?
 

If you examine the internal signals of a post-route simulation, it is normal to see many glitches in the combinatorial logic, but the glitches should disappear before the next clock edge, so the flops operate cleanly.

- Do you see the malfunction in post-route simulation, or in hardware?
- If you change the clock frequency, does the malfunction change too?
- Have you fully constrained the timing, and does your timing analyzer tell you that all constraints are met?
 

    cmos babe

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- Do you see the malfunction in post-route simulation, or in hardware?
I see it in hardware.
- If you change the clock frequency, does the malfunction change too?
No it doesn't.
- Have you fully constrained the timing, and does your timing analyzer tell you that all constraints are met?
I used PERIOD and OFFSET to constraint the clock and they were met.

Code:
NET "clkm" TNM_NET = "clkin";
TIMESPEC "TS_clkm" = PERIOD "clkin" 15 ns HIGH 50 %;
OFFSET = IN 8 ns BEFORE "clkin"  ;
OFFSET = OUT 8 ns AFTER "clkin"  ;
 

i found out that if i fell inset FF in the left most nibbles of any memory word the design will operate with no problems.So i will only sacrifice one memory location.I am using block ram by the way.
 

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