Webpack classic 4 problems with Spartan XCS10

[fireplus]

hi,
any body know a synthesis tool that support the spartan xcs10 from xilinx
i have webpack classic 4 but my problem that i didn't have a synthesis tool that support this old device.
i have snplifiy pro 7.6 but it didn't support this device

sorry, i'm still beginer in the fpga field so
if any body have any information please help

bye


Fire in the Wire :sm2:

Added after 32 minutes:

hi,

here the error message which appeares to me when i use webpack classic

synthesis on counter_2:test

log file: "F:\test\counter_2.srr"

Running Vhdl Compiler...
Vhdl Compiler Completed

Vhdl Compiler: 0 errors, 1 warning, 0 notes

Running Mapper...
Launching mapper in pro mode
Mapper Completed with warnings

Mapper: 0 errors, 4 warnings, 6 notes

Total: 0 errors, 5 warnings, 6 notes
exit status=0

EXEWRAP detected a return code of '1' from program 'xilperl'

Done: failed with exit code: 0001.
bye

Fire in the Wire :sm2:

Added after 17 minutes:

hi,

here is the error happen at the translate stage of the implemantion:

Launcher: "COUNTER_2.ngo" is up to date.
Reading NGO file "f:/test/counter/counter/implement/ver1/rev1/COUNTER_2.ngo" ...
Reading component libraries for design expansion...

Annotating constraints to design from file "COUNTER_2.ucf" ...

Checking timing specifications ...
Checking expanded design ...
NgdBuild:604 - logical block 'digit1_4_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.
NgdBuild:604 - logical block 'digit1_5_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.
NgdBuild:604 - logical block 'digit1_6_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.
NgdBuild:604 - logical block 'digit1_0_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.
NgdBuild:604 - logical block 'digit1_1_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.
NgdBuild:604 - logical block 'digit1_2_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.
NgdBuild:604 - logical block 'digit1_3_.L1' with type 'SLDPE_1' is
unexpanded. Symbol 'SLDPE_1' is not supported in target 'spartan'.

NGDBUILD Design Results Summary:
Number of errors: 7
Number of warnings: 0


One or more errors were found during NGDBUILD. No NGD file will be written.

Writing NGDBUILD log file "COUNTER_2.bld" ...
File 'f:/test/counter/counter/implement/ver1/rev1/COUNTER_2.ngd' does not exist.
NGDBUILD failed.
Implementation ver1->rev1 Failed.


bye


Fire in the Wire :sm2:

 

[Vonn]

vhdl file ngd does not exist

Have you tried the foundation 4.1 ?
Also the FPGA Adv. 5 can support you in the synthesis phase but you will need x!linx tool in the P&R phase

 

[fireplus]

ngdbuild:604 - logical block

hi,

Could you please tell me from where i can get the xilinx foundation 4.1 ?
it seems that it's not availiable at xilinx.

thank you for help
bye

Fire in the Wire :sm2:

 

[it_boy]

implementation ver1->rev1 failed

xilinx site says they give the previous versions of ISE free.

You may have to create an account to download the tools.

Click the link "ISE Classics" in
https://xilinx.com/products/design_resources/design_tool/index.htm

 

[fireplus]

spartan-xl tools

hi,
i have xilinx classic
xilinx didn't support a synthesize tool for spartan,spartanxl family
webpack classic only make the implemantation stage not the synthesize
they said that you must have a third party tool to do the synthesize stage of the design, i have synplify pro 7.6 but it didn't support the spartan,spartanxl family
so if any body know from where i can get a synthesize tool for the spartan family
please help
bye

Fire in the Wire :sm2:

 

[Renjith]

xilinx spartan 6 translate failed

Hi Fireplus
u can get foundation series of ISE from the xilinx itself, find ur nearest dealer for xilinx products. u can get Evaluation CDs of foundation from them.

 

[tkbits]

.ngd does not exist

The XCS10 is an old chip. I don't know if you can get the license keys for any of the old commercial tools that support it. You might try something like JHDL which may generate the needed EDIF, but it won't be the schematic-Verilog-VHDL solution most people work with.