Warning: NON UNATE PATH IN CLOCK DOMAIN..

[Sumitha Sudhakaran]

What is meant by non unate path in clock domain?? How to correct this warning????

 

[dftrtl]

When clock going through exor it is called non unate path.Because of other input the output of clock can be inverted or same.
It is just information.

 

[Sumitha Sudhakaran]

Do these non unate paths occur due to the logic?? Wat is the harm?? How shud they be removed??

 

[sakthikumaran87]

Hei unateness is an attribute, for ex: when u give any input to an inverter its output will be inverted. It is said to having an negative unate. Similarly a buffer will rise when input is high and falls when changed to low. so it is called as positive unateness. whereas as dftrtl rightly pointed in a gate like xor if a value goes to 1, depending on other inputs it can either goes to 1 or 0. such a gate is defined with an non unate attribute. this is just an info and nothing to do with removing them.

 

[jeevan.life]

No need to correct if phase inversion is intended. Else you may need to check the inverting elements and the clock phase reaching at the flops. It can affect your functionality and timing. To correct you can simply add an inverter in front of the inverting element or remove it altogether if not needed.