Vth problem in cadence

[Karthikeya]

hi
in .018u process when i decreased L of nmos from 0.54u to 0.18u the Vth increased by abt 100mV ...i dont understand why??? i thought the trend shud be the other way...
plz hlp

 

[dog1357]

.018u process ? is it 0.18u?

for AMIS0.5u, if u increase L, Vt will be increased for both PMOS and NMOS, maybe u need to find out what your process defines.

 

[Karthikeya]

how do i chk tht in cadence

thnkz

 

[dumbfrog]

try to sweep the Vth vs L

 

[IC_Lee]

u can find the exact vth in your model file.