Voltage Translator using Spartan 7

Status
Not open for further replies.

Jetach

Member level 1
Joined
Jun 25, 2013
Messages
35
Helped
0
Reputation
0
Reaction score
0
Trophy points
6
Visit site
Activity points
304
Hello,

I'm fairly new to FPGA design, but currently I am using two different FPGA's, one running at 3.3V and another running at 1.8V.

I would like to use another FPGA to connect both the 3.3V and 1.8V together so that they can communicate with one another.

If i use Vivado, should I just use an I/O planning project and set different I/O banks to different VCCO's and connect them to one another?
 

Will you be using the Spartan7 as only a level translator? If it's only used to do that then you might be better off adding level translators to the board to communicate between the 1.8V and 3.3V FPGAs.

If you envision doing something to the communication between the two FPGAs then perhaps a Spartan 7 makes more sense. That's something you will have to determine.

You can use an I/O planning project but I advise saving the xdc file as <design_name>_physical.xdc separate from the <design_name>_timing.xdc.
 

Yes, I do plan on using other parts of the FPGA to communicate with each other.

When I try to set VCCO to a certain voltage, there only appears to be LVCMOS18, and I am unable to find LVCMOS33.

So when doing this, I would set one set of I/O ports to 1.8V and another set of I/O ports to 3.3V and just set the ports equal to each other when I write the VHDL code later?
 

in verilog


Code Verilog - [expand]
1
2
3
4
5
6
7
8
9
module translator (
  input  input_18v,
  input  input_33v,
  output output_18v,
  output output_33v
);
 
assign output_18v = input_33v;
assign output_33v = input_18V;



Does it have LVTTL as an option? That is usually the 3.3V standard.

It didn't sink in a first but there isn't a Spartan 7 did you mean and Artix 7 or a Spartan 6? Whatever device it is open the Xilinx Document Navigator and select the catalog view then perform a search for "select io" after selecting the correct family.
 

I meant a Virtex 7. Xilinx is slowly stopping support for the old ISE Design Suite, so I am trying to learn the new Vivado software.

The choices have a series of HSLVDCI, HSTL, HSUL, LVCMOS, LVDCI, and SSTL.

But they all appear to be either 1.5V or 1.8V.

I am just creating a new set of I/O ports, with the default being LVCMOS18.

- - - Updated - - -

Changing my board to the kintex-7, it has the option for LVTTL. Thank you. The Virtex-7 seemed to be limited.
 

Virtex 7 should have 3.3V support are you sure you weren't trying to use an HP bank?

HP banks are numbered with a 3 in the first digit. The HR banks are the ones numbered with a 1 in the first digit.

HR banks will support the 3.3V standard, but HP banks only support standards 1.8V and below. The HP banks are meant for high performance interfaces like memories and such and includes OCT and DCI support, which aren't in the HR banks.

Switching to a K7 might be worthwhile considering the cost of a V7 device. Have you looked at the Artix parts? They might be a viable solution if you need to keep costs under control.

regards
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…