Voltage Regulator Designs for DDR DRAMS

[chanchg]

ddr ldo site:edaboard.com

Hello Everybody,

Where can I get basic specs for designing Voltage Regulators for moderns DRAMS?
Any link, any article will be helpful..


Regards,

 

[ambreesh]

Kindly find the papers attached, They are to design a LDO for memories.
You shall face some hitches, but a good one

LOW-VOLTAGE LINEAR VOLTAGE REGULATOR SUITABLE FOR MEMORIES
W. Aloisi, S.M. Billé, G. Palumbo

ABSTRACT
In this communication a low-voltage linear voltage regulator in
CMOS technology is presented. It is based on a two class-AB
gain stage and, hence, does not suffers from internal slew-rate
limitation when very large load capacitances are used. The
linear regulator suitable for memory application was designed in
a 0.35 µm standard CMOS technology. The regulator can work
with a no-regulated input voltage in the range from 1.3 V to 3 V
providing a regulated voltage of 1 V with a load capacitance of 2.2nF

 

[moda]

Usfull tools and sulosion at TI site.

Regards

Moda

https://focus.ti.com/lit/an/slyt130/slyt130.pdf

**broken link removed**

https://focus.ti.com/docs/prod/folders/print/tps51020.html

**broken link removed**

 

[lunren]

Hope this help:
h**p://users.ece.gatech.edu/rincon-mora/

 

[chanchg]

Thanks to everyone... One more question...

How the Regulator specs changes for DDR RAMS used in Desktops and those used in NOtebooks?

Thanks,

 

[moda]

In Desktops - you can use Linear regulator.

And those used in Notebooks you will use switch mode reg, this is to save power.

Regards


Moda

 

[Btrend]

In Desktops - you can use Linear regulator.

And those used in Notebooks you will use switch mode reg, this is to save power.

Regards


Moda

Hi Moda:
what kind of switch mode reg needed?
Vin= ? Vout=? current mode/voltage mode? switching frequency ?

Thanks

 

[moda]

Hello,
Pleas look at the sw mode example:

https://focus.ti.com/lit/ds/symlink/tps54372.pdf

Regards

Moda