Voltage peak detetctor

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kirkr

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I have designed a opamp based voltage peak detector. As shown in the diagram below. however the output voltage only follows the input I thought i had the cap sized right to hold the value longer. The input wave is only about 1ns or smaller pulse is the goal.
 

Test it with a slow waveform first.

Is that a PMOS or NMOS? I would expect NMOS as common drain.

Keith
 

That is a pmos. I will try with a slow wave first. thanks
 

It should be an NMOS source follower, I would have thought. As a PMOS you have introduced and inversion and so have positive feedback.

Keith
 

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