Voltage mode push pull converter ..or with RHPZ?

[cupoftea]

Hi,
08:56 of this...

(...ok i dont know what happened, i hope people can get into that link)

..says that you cant do pushpull SMPS in voltage mode.

But surely this is not totally true?
I mean, yes, voltage mode gives the flux walking problem....and cannot be solved by a blocking cap in pushpull.

But you do get voltage mode pushpulls that work fine.....often say FETs with considerable Rdson's are chosen so as to mitigate flux walking.

Also, he says you cannot do voltage mode with converters that have a RHPZ....but power integrations topswitch is a voltage mode flyback.
So why does he say this?

 

[aliarifat794]

Vid not available.....

 

[cupoftea]

Thanks, but if you click "watch on youtube" you can watch it there.
The video is on youtbe and is called..

"Easy to Follow Voltage Mode vs Current Mode vs Voltage Mode + Voltage Feedforward Control Methods"

It is by Dr Ali Shirsavar at Biricha.com

 

[Easy peasy]

Where would you put the blocking cap in a push-pull ? - sketch please

Yes of course you can do a push pull with overall volt mode control - there are several simple methods to avoid flux walking.

EP

 

[Easy peasy]

.but power integrations topswitch is a voltage mode flyback.

this is not strictly true - the current information is widely used inside these parts, often in conjunction with the internal state machine, a peak current is set and the number of pulses is modulated to get Vout, as the load varies the state machine increments or decrements the pk curr setting.

For no volt feedback the state machine allows only short on times every 64mS or so,

similarly for shorted load events.

 

[cupoftea]

this is not strictly true - the current information is widely used inside these parts, often in conjunction with the internal state machine, a peak current is set and the number of pulses is modulated to get Vout, as the load varies the state machine increments or decrements the pk curr setting.

Thanks, ...yes that does happen, but not at or near full load....what you describe happens when its backed off from full load. On or near full load and its pure voltage mode.
..as per page 4 , RHS, bottom diagram

https://www.power.com/sites/default/files/documents/topswitch-jx_family_datasheet.pdf

Quoting from page 5 of topswitch datasheet.....

Oscillator and Switching Frequency
 The internal oscillator linearly charges and discharges an
internal capacitance between two voltage levels to create a
triangular waveform for the timing of the pulse width modulator.
This oscillator sets the pulse width modulator/current limit latch
at the beginning of each cycle

...as can be seen, this describes the artifical ramp generator used as per voltage mode control......it does not use the source current to create the ramp in any way, when on or near full load. There is of course, a current limit in the background all the time. (as there is in any voltage mode controller) ..but this, as you know, is not part of current mode control ramp formation.

Other of Power integrations SMPS chips are also voltage mode...eg their 2 Tran forward chip is voltage mode.

In AN-57 by power integrations, (this is a paper on feedback loop of topswitch)...they declare straight away that the paper concerns voltage mode operation for Topswitch......

https://edisciplinas.usp.br/pluginfile.php/1589223/mod_folder/content/0/an57.pdf?forcedownload=1

Where would you put the blocking cap in a push-pull ? - sketch please

Thanks, as described, there is nowhere in pushpull to put a blocking cap...this presumably is why Dr Ali says Pushpull is a no-no for current mode?
But there are many voltage mode pushpulls in high volume production.

Yes of course you can do a push pull with overall volt mode control - there are several simple methods to avoid flux walking.

...Thanks, the method most are familiar with is adding resistance into the paths of each primary coil half...and making it the same resistance in each half....there are more exotic ways as you know, but generally these would be a waste of time....just pick another topology instead.
Adding resistance is a bit brutal, especially when the power is high. Some people use FETs with higher rdson than would otherwise be wanted.....then at least that fet is heatsunk.
Another method is of course to use a too-big transformer....again, not great.

Another way is a bit dodgy also...it involves heavily over filtering the source current sense limit...then if it fluxwalks for a while, then it doesnt straight away hit the current limit (which would totally knock it haywire.)...and then it may (hopefully) naturally just wander its flux-walking back down again, and you get away with it....or you hope you get away with it.
These are 5 penny bit, common-as-much techniques for voltage mode pushpulls......which is popular because cheap old voltage mode control chips are as cheap as chips. And transformers, even if made far too big for that general power level, are dirt cheap from China anyway.

There are no really suitable, reliable ways of doing a voltage mode pushpull....just "bodge it and scarper methods". The reliable ways of doing it would be a waste of time...since you would best just choose another topology...or do it in current mode.

 

[Easy peasy]

@cupoftea
" ...as can be seen, this describes the artifical ramp generator used as per voltage mode control......it does not use the source current to create the ramp in any way, when on or near full load "
- actually this is not strictly true, as someone who was privy to the early design and improvement of these things - there is a lot going on inside a TOPswitch to help guarantee stability and the elimination of 1 - 2 - 1 - 2 current pulses at > 50% duty cycle ( and near to - and for CCM ). Just because they only publish the simple version - don't assume it is the whole story, for example the ramp can be modulated by Vin, which is nearly identical to current mode in a flyback.

" Thanks, as described, there is nowhere in pushpull to put a blocking cap...this presumably is why Dr Ali says Pushpull is a no-no for current mode? "

actually he says the opposite, current mode only for push pull.

The most common way to ensure flux balance in a push pull, is symmetric layout coupled with generous dead time, and a ramp that is fed from Vin.

The dead time ( typ 5% of max ON time or greater for each half cycle ) allows enough flux reset time to keep things bounded - of course if any output rectifiers are wildly different in ON drop this will cause secondary side pull of the BH loop.

EP

 

[cupoftea]

actually this is not strictly true,

Thanks, i see what you mean....though when someone comes to you with a topswitch flyback, with 24vout, and they have also used the "NPN in the feedback loop" so as to reduce the need for high optocoupler current, and its gone into CCM at low line, then you have to compensate it, and ccm voltage mode flyback needs a type 3 compensator if its going to avoid being overly slow in transient response...but i dont see them recommending or giving a type 3 compensator for it.
(the NPN has a wide tolerance, which is the last thing you need in the feedback loop which also has an opto, and then to make it worse, its also in voltage mode)

Also, i dont doubt what you say, but AN-57 as above, does say its voltage mode....possibly an apps engineer whose made an error?

Thanks yes i got my words mixed up ref current mode ref Dr Ali....i meant that question, but "voltage mode" instead.

TOPswitch designs often dont have support in thier apps software so you have to self compensate it...and if they wont even tell you if its voltage mode or current mode...then things arent that great for using it. As you know, the compensator gains etc are all needed if we are to self compensate.

 

[Easy peasy]

all current mode or similar systems still have to have an outside volt mode loop to control Vout.

 

[cupoftea]

Thanks, have had conversations with Power Integrations before on their forum....I think some 6 months or so ago......the answer was a little convoluted as i remember.....i was trying to dig out whether Topswitch was voltage or current mode control when at full power....and what the internal controller gains were etc etc.......will check and see what was the overall situation. As you know, its necessary to know whether voltage mode or current mode so that can come up with the feedback compensation.

Their software does the design for you...but if you need to use a different transformer or something, then their software, as i remember it, wont necessarily do it for you, and so you need to DIY it....and as you know, first know whether its current or voltage mode.

 

[Easy peasy]

We have designed nearly 1000's of PI converters for people - if used within spec - the compensation is fairly easy - these parts are not for high spec - high performance converters as a rule.

 

[cupoftea]

Thanks, This is the reply from Power.com on their forum

QUOTE...
If you want a stable feedback loop, you will need to do measurements, as the TOPHX changes operating mode as the load changes. The transfer functions are protected IP. Attached is a suggested setup for using the current injection method at the TOPSwitch control pin to break the loop and obtain gain-phase plots. The analyzer shown in the attached file is the venerable HP4194A, but you can use the analyzer of your choice, as long as it is used with an isolation transformer, as the current injection circuitry is by necessity primary-referred.. We suggest using a wide-bandwidth injection transformer such as the Cine Mag CMOQ-1H for signal injection, as it is linear over a wide bandwidth.
....UNQUOTE

So as they say, you cant calculate the feedback loop....they dont give out the controller gains etc...its their protected IP...so it needs to be measured with a frequency analyser, or so they suggest.

As you know, its needed to know whether its voltage mode or current mode so that it can be correctly compensated.......having said that, if the controller gain is not known, then its not going to be possible to compensate it.......unless PI Expert software does exactly the flyback circuit with transformer thats wanted.

This is a topswitch flyback from power integrations....

https://www.power.com/sites/default/files/forum/files/TOPSwitch-HX_PIDesign2_24v%200p8a_from%20piexpert.pdf

...as can be seen the compensation is not type 3, so either its dcm across the entire line input, or its current mode......but without the current ramp......which seems odd even if its really "voltage mode with feedforward"

Actually in the following quote from power.com, they confess topswitch is in voltage mode.....

QUOTE.........
Submitted by PI-Wrench on 07/25/2023
If you don't have a gain-phase analyzer, you can use the pulsed load response to check stability. You won't get any numbers for gain and phase, but you can check for marginal stability. BTW, there is nothing wrong with a voltage mode converter running in CCM - this was done with TOPSwitch all the time in the early days of TOPSwitch 1 due to the limitations imposed by the internal mosfet RDSon. Everyone used big mosfets with 3842 controller or equivalent running in DCM because they were scared of the RHP zero - turns out not to be an issue for a reasonable design (read not overly continuous) at 66 or 132 kHz. BTW, an HP4194A is what we used for gain-phase analysis in the early days at PI. They are big and clumsy, but they also cost less than a good oscilloscope these days on the used market That analyzer dates from the days when HP still meant quality gear. I have one at home for my own investigations.
....UNQUOTE



Also, in the following quote from power int apps engineering......they again confess that topswitch is a voltage mode converter...they say there is the double pole of the Power stage L and Cout.....and that can only mean voltage mode...... (they are referring to AN-57 here)...

QUOTE....
The 500 Hz resonance limit may have been imposed to reduce the difficulty of stabilizing the loop due to the double pole introduced by the effective inductance and the output capacitance. However, the ESR zero of the output capacitor needs to also be considered - the ESR zero is actually your friend in this situation. Polymer capacitors may be more problematic, as they can have a lower ESR compared to their capacitance, pushing out the ESR zero frequency.
....UNQUOTE

 

[Easy peasy]

Standard engineering practice is to use a stepped load driven from a sig gen, 1Hz - 20kHz, and observe the Vout, ( or Iout as the case may be ),

typical load steps employed are, 10% - 50%, 50% - 100%, 10% - 90%, 0 - 20%, and 0 - 100% for the zealots.

this will prove ( assuming the Vout has very limited, damped ringing, 1.5 cycles max ) that the loop is stable, any overshoot and undershoot is immediately visible - and the worst case frequencies are easily found ( least phase margin - or too high gain at that freq - or both )

50Hz, 100Hz, 150Hz, 300Hz, ( and their 60Hz counterparts ) are usually sensitive areas for off mains power supplies.

Such load stepping provides high confidence in the total loop and does not require hacking into the FB loop.
It also tells you where the FB loop becomes in-effective - which is nice to know.
Sweeping the loop is great - and to be encouraged - but it is small signal - and needs also to be done at varying loads - load stepping is large signal and will tell you things an FRA can't.



EP

 

[cupoftea]

Thanks, thats excellent advice, Transient testing is always to be done.
Though as you know, the attached, from "case#2" onwards (pgs 3,4,5) show that transient response is often not enough.......especially with CCM voltage mode
converters, there are situations where you need to have sufficient gain and phase margin and check it with loop calcs and measurements....and thus know whether you have a voltage mode or a current mode converter.

Offline voltage mode , CCM flybacks, (eg topswitch when in CCM at low mains) have the problem, as you know, that reducing the loop crossover can actually make them go unstable if not properly
compensated.......and voltage mode is a stinker for this.....with its output double pole......aswell as its RHPZ......and if a large-ish amount of capacitance is connected to the output of a voltage mode converter, then it may well go unstable.....but far less so in current mode.........also, if there is also an output LC post filter, then having a big capacitive load attached can deffo make it go unstable if its voltage mode......this is why its needed to be known whether or not topswitch is voltage mode or not.

Current mode?.....do transient response and its unstable...no probz...just reduce the loop gain...simple.
Voltage mode?....do transient response and its unstable.....either reducing or increasing the loop gain may make you go even more unstable.

Its also fair to say that the customer connection of their unknown amount of load capacitance to a voltage mode CCM converter is generally to be avoided.

...Anyway, the above shows that Topswitch is voltage mode...power.com actually declare it thus...so it seems that for an offline flyback with topswitch, that goes into CCM at low mains, (they virtually all do)....then type 3 compensation would be needed. Even then i dont see how it can be manually compensated, since as the above declares....power.com say that the gains of the TOPswitch controller etc are their "internal IP".

(though to give credit where due......the topswitch designs that come off their PI expert are bound to be good......ditto their innoswitch designs from that software.........but stray from that design and try to do the compensation one self...and trouble could emerge as you dont know the controller gain for the feedback loop calc.........and even with transient response testing......if its a voltage mode ccm flyback, then transient response testing may not be sufficient, as Doc Ridley says)

...this isnt to mention stuff like having a topswitch ccm voltage mode flyback, and wanting to make it stable with loads of different CTR opto's and with a poorly toleranced NPN in the feedback loop because you want to reduce the topswitch opto current.

DER243 page 7 shows an NPN in a topswitch feedback loop....

https://www.power.com/sites/default/files/documents/der243.pdf

 

[cupoftea]

typical load steps employed are, 10% - 50%, 50% - 100%, 10% - 90%, 0 - 20%, and 0 - 100% for the zealots.

Thanks, and i know you are joking when you say zealots.
Since ayk, if an SMPS will ever see load from 0-100%-0%...then it must also be transient tested thus.
And if it passes that...then it will obviously pass any 10-90% transient test.

So generally, the 0-100%-0% transient test is the main transient load test needed to be done.

There are few PSU's where it can be garanteed for the whole of its life, that it will never ever see a 0-100%-0% load transient situation.
So testing it thus is good.....then when it passes that...you can avoid needing to do the 10-90%-10% transients.