Voltage levels of HSTL standards

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test_out

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Hi every one,

I have read about HSTL standard and I so confused with the voltage level of HSTL standards.
Does any one have the voltage levels (low input voltage max,high input voltage min, low output voltage max, high output voltage min...) for HSTL_I_18, HSTL_II?

Thank u for your time and help
 

hstl jedec

Here's a good starting place. If it doesn't answer all your questions, just holler. Someone here should know.

EIA/JEDEC Standard
"High Speed Transceiver Logic (HSTL): A 1.5 V Output Buffer Supply Voltage Based Interface Standard for Digital Integrated Circuits"
https://www.jedec.org/download/search/jesd8-6.pdf
 
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    test_out

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    gavin23

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hstl voltage levels

Thank Echo47,

The document is really helpful to me. Do you have other documents for HSTL 1.8 and SSTL2, SSTL18?

Again, thanks for your time and help.

Test_out
 

hstl 1.8

I haven't seen an official standard for HSTL 1.8V. I suspect 1.8V may be an industry defacto standard. Does anyone else know for sure?


"Stub Series Terminated Logic for 1.8 V (SSTL_18)"
https://www.jedec.org/download/search/jesd8-15a.pdf

"Stub Series Terminated Logic for 2.5 V (SSTL_2)"
https://www.jedec.org/download/search/jesd8-9b.pdf

"Stub Series Terminated Logic for 3.3 Volts (SSTL–3)"
https://www.jedec.org/download/search/jesd8-8.pdf


JEDEC publishes lots of standards. They seem to be free downloads, despite the advertised price:
**broken link removed**
 
hstl logic

The voltage level description has no problem.

you can find a digital book to check what is VIH, VIL, VOH, VOL,

you will understand them clearly.




 

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